IC chips are the heart of practically all modern electronic devices. They are typically manufactured by forming one or more arrays of unconnected gates or transistors on a silicon wafer, and then metalizing the array through masks to form interconnections between gates, and between gates and connection pads, that gives a chip its individuality and functionality.
Wafers are typically available in two types: standard-size arrays and borderless arrays. In the standard-size type, a set of individual arrays of a standard size are formed on each wafer, together with surrounding I/O pads and appropriate passivation structures for chemical isolation against environmental contaminants, as well as guard rings for electrical isolation against stray electromagnetic interference. After the interconnections have been formed, the wafer is cut between the arrays to provide individual finished chips.
In the borderless array type of wafer, a single array is formed to cover the entire surface of the wafer. Individual ICs are produced, after the formation of interconnections, by cutting through unused portions of the array. This method does not, however, lend itself to passivation.
Masks for the production of wafers and the formation of interconnections are extremely expensive, so that the manufacture of custom wafers is not economically practical for the production of chips in quantities less than hundreds of thousands. Yet there are many instances in which only a few thousand chips of any particular design are required. In order to economically produce such quantities, a wafer must be able to carry a large number of IC arrays of varying sizes for different purposes and/or different customers. This allows many different IC chips to be produced simultaneously with a single mask.
Problems arise in carrying out the latter method with either of the traditional types of wafers. In a standard-size array wafer, the array size must be large enough to accommodate the largest IC to be produced on the wafer. Consequently, substantial portions of the array are wasted for smaller ICs. Borderless arrays can be cut as desired to fit various-sized ICs on a wafer without substantial waste; however, borderless arrays, which are uniform throughout the wafer surface, do not lend themselves to passivation. Passivation structures can only be formed where the wafer substrate is accessible, i.e. where no transistor array has been formed on the wafer.
It is therefore desirable to provide a fabrication method which allows many ICs of varying sizes to be formed on a uniform generic wafer, yet allows passivation structures and guard rings to be formed around each individual IC regardless of its size or shape.